CONTENTS Title Page Copyright Page Preface 1 KAV30 Functional Overview 1.1 VMEbus Master Overview 1.2 VMEbus Slave Overview 1.3 VMEbus Arbiter Overview 1.4 VMEbus Utility Bus Signals 1.5 VMEbus Interrupt Handler 1.5.1 Handling Vectored Interrupts 1.5.2 Handling Autovectored Interrupts 1.5.3 Handling IRQ7 Interrupts as Vectored Interrupts 1.6 VMEbus Interrupt Requester Function 1.7 VSB Master Overview 1.8 VSB Arbiter Overview 1.9 VSB Interrupt Handler Overview 1.10 DAL Bus Timeouts 1.11 KAV30 Interrupt Priorities 2 VAXELN Kernel for the KAV30 2.1 Asynchronous System Trap (AST) Processing 2.1.1 AST Delivery 2.1.2 AST Data Structures 2.2 Timers 2.3 Calendar/clock 2.4 FIFO Buffers 2.5 Battery Backed-Up RAM 2.6 Scatter-Gather Map 2.6.1 Outgoing SGM 2.6.2 Incoming SGM 2.6.3 Byte Swapping During SGM Operations 2.6.3.1 Mode 0 Swapping 2.6.3.2 Mode 2 swapping 2.6.3.3 Mode 3 swapping 2.7 Communicating With Other VMEbus Devices 2.7.1 Using Shared Memory Pages 2.7.2 Using KAV30 FIFO Buffers 2.8 KAV30 Error Logging Support 3 Developing KAV30 Applications 3.1 Accessing the VMEbus and VSB Address Space 3.1.1 Accessing the VMEbus and VSB Address Space Directly 3.1.2 Using the KAV30 Services to Access the VMEbus and VSB Address Space 3.2 Writing Asynchronous System Trap Routines 3.2.1 Coding Asynchronous System Trap Routines in VAX Ada 3.2.2 Coding Asynchronous Trap Routines in VAXELN Pascal 3.3 Coding Guidelines 3.3.1 VAX Ada 3.3.2 VAX C 3.3.3 VAX FORTRAN 3.3.4 VAXELN Pascal 3.4 Compiling and Linking KAV30 Applications 3.5 Accessing KAV30 Error Codes from a User Application 3.6 Building VAXELN System Images for the KAV30 3.6.1 Configuring the VMEbus and VSB 3.7 Developing SCSI Class Drivers 3.8 Building SCSI Class Drivers into Applications 4 VAXELN System Services for the KAV30 4.1 VAXELN Routines for the KAV30 Overview 4.2 KAV30 Routine Descriptions KAV$BUS_BITCLR KAV$BUS_BITSET KAV$BUS_READ KAV$BUS_WRITE KAV$CHECK_BATTERY KAV$CLR_AST KAV$DEF_AST KAV$FIFO_READ KAV$FIFO_WRITE KAV$GATHER_KAV_ERRORLOG KAV$IN_MAP KAV$INT_VME KAV$LIFO_WRITE KAV$NOTIFY_FIFO KAV$OUT_MAP KAV$QUE_AST KAV$RTC KAV$RW_BBRAM KAV$SET_AST KAV$SET_CLOCK KAV$TIMERS KAV$UNMAP KAV$VME_SETUP A KAV30 Factory Settings A.1 Hardware Configuration A.2 Software Settings B Sample Programs-Interprocessor Communication B.1 FIFO Producer B.2 FIFO Consumer B.3 AST Routine For FIFO Producer and FIFO Consumer Sample Programs B.4 Build File B.5 Data File C Sample Programs-MVME335 Device Driver C.1 Device Driver C.2 Interrupt Service Routine D Sample Programs-VDAD Device Driver D.1 Device Driver D.2 Definitions File D.3 Test Program D.4 Build File D.5 Data File FIGURES 1-1 Converting VMEbus Interrupt Vectors into VAX Interrupt Vectors 1-2 Constructing an 8-bit VMEbus Interrupt Vector 2-1 ASB Fields 2-2 AST Queue 2-3 Calendar/clock Address Map 2-4 KAV30 as Producer and Consumer 2-5 KAV30 as Neither Producer nor Consumer 2-6 Outgoing SGM Conversion to VMEbus or VSB A32 Addresses 2-7 Outgoing SGM Conversion to VMEbus or VSB A24 Addresses 2-8 Outgoing SGM Conversion to VMEbus or VSB A16 Addresses 2-9 A32 Incoming VMEbus Address 2-10 A24 Incoming VMEbus Address 2-11 Incoming SGM Conversion of A32 VMEbus Addresses 2-12 Incoming SGM Conversion of A24 VMEbus Addresses 2-13 Little-Endian Storage Format 2-14 Big-Endian Storage Format 2-15 Mode 0 Byte Swapping 2-16 Mode 2 Byte Swapping 2-17 Mode 3 Byte Swapping 2-18 Sample Master Error Log Entry 2-19 Sample Slave Error Log Entry 3-1 Sample Add Device Description Menu 4-1 Programming the Realtime Clock TABLES 1-1 Interrupt Source Codes 1-2 System Control Block Layout 1-3 SCB Vector Offsets for Autovectored ISRs 1-4 VMEbus Address Lines A<3..1> 1-5 KAV30 Interrupt Pins 1-6 KAV30 Interrupt Priority Levels 2-1 Internal Master Error Code 2-2 Internal Slave Error Code 3-1 Compiling and Linking Commands 4-1 KAV30 Routine Summary